Embedded systems in FPGAs
University of Gothenburg
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Pace of study: 50 %
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Education information from the published source. The education record and its time-bound offerings are kept separate.
Code: FYD160
I den hĂ€r kursen lĂ€r man sig att konstruera inbyggda system baserade pĂ„ en 32-bitars âsoft CPUâ som laddas ner i en FPGA. Förutom att konstruera hĂ„rdvaran lĂ€r man sig ocksĂ„ att skriva kĂ€llkodsfiler (i C) till en soft CPU. Tekniken tillĂ€mpas sedan pĂ„ typiska I/O-enheter som t ex displayer och givare. Applikationslager, drivrutiner och âhardware application layerâ Ă€r exempel pĂ„ begrepp som behandlas ingĂ„ende samt för- och nackdelar med konfigurerbar hĂ„rdvara. Förkunskapskravet Ă€r att man klarat FYD150.
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Each offering has its own dates and conditions. Closed offerings are retained as history and do not mean that a new application is open.
University of Gothenburg
Start date:
End date:
Pace of study: 50 %
Retrieved: .
Published: .
Publication version: 8e217193-f5fa-4778-b085-a4521fd03e8d
Checksum: 1b0dc54c0fc8a359f83ba9dc8f9d468479ce432de4c03bce3b8b33dd67fe3f6c
Last changed according to the source: 2026-02-16T09:39:05